VHDL code for metal detector -

i working on metal detector @ moment can't figure out how implement vhdl code.

entity sensor     port ( metaldetector : in std_logic;           metal         : out std_logic;         ); end entity sensor; 

as long there isn't metal close sensor 'metaldetector' gets pulses on 6.1khz frequency. long 'metaldetector' keeps getting pulses out port 'metal' should '0'.

when there pulse missing (or multiple pulses) 'metal' should become '1' until next pulse.

it shouldn't hard make code can that, can't figure out. great!

we managed solve problem of other students, , lot of trying. i'll post our solution down here, can usefull others. :)

library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all;  entity sensor      port ( metaldetector : in std_logic;             clk : in std_logic;             metal : out std_logic           ); end entity sensor;  architecture sensorbehav of sensor        signal new_count, count: unsigned(20 downto 0);      begin      process (clk, metaldetector)     begin         if (rising_edge (clk))             if (metaldetector = '1')                 count <= (others => '0');             else                  count <= new_count;       end if;     end if; end process;  process (count)     begin         new_count <= count + 1; end process;  process (count)     begin     if (count > 9000)         metal <= '1';     else         metal <= '0';     end if; end process; end architecture;